Logic from Transistors
Build NOT, NAND, NOR, AND and OR gates from NPN switches, and see where digital meets analog.
Lesson progress
- Output Y
- 3.45 V
- NAND → HIGH (1)
- Supply current Icc
- 1.55 mA
- LED 1.55 mA
- Power P
- 7.75 mW
- wasted mostly when LOW
- Noise margins NM
- 2.25 / 0.52 V
- HIGH / LOW
Truth table, measured
click a row to apply it| A | B | Y (ideal) | Y (circuit) | Check |
|---|---|---|---|---|
| 0 | 0 | 1 | 3.45 V → 1 | ✓ works |
| 0 | 1 | 1 | 3.45 V → 1 | ✓ works |
| 1 | 0 | 1 | 3.45 V → 1 | ✓ works |
| 1 | 1 | 0 | 151 mV → 0 | ✓ works |
Each row is solved with your component values. A row “works” when the output voltage lands on the correct side of the input thresholds of the next gate.
Transfer curve
output Y as input A sweepsFrom switches to decisions
In the transistor module, a small base current switched a big collector current on and off. Now put a resistor between the supply and the collector and read the voltage at the collector. When the transistor is off, the resistor pulls the output up to HIGH. When it is on, the transistor pulls the output down to almost 0 V. The output is always the opposite of the input. That is a NOT gate, or inverter.
Stack two transistors in series and the output only goes LOW when both are on: NAND. Put them side by side in parallel and either one can pull it LOW: NOR. Add an inverter after either one to get AND and OR. This style of circuit is called resistor–transistor logic (RTL). It flew to the Moon in the Apollo Guidance Computer.
Real gates are analog circuits. A “1” is not exactly 5 V, and each gate input reads anything above a threshold as HIGH. The transfer curve and the noise margins show how much abuse a gate can take before it gets the wrong answer.
Try this